(Hong Kong)
Product Summary
The EPM7128STC100-10N is a high-density, high-performance PLD. It is based on Altera’s second-generation MAX architecture.
Parametrics
Absolute maximum ratings: (1)Supply voltage:-2.0V to 7.0V; (2)DC input voltage:-2.0V to 7.0V; (3)DC output current, per pin:-25mA to 25mA; (4)Storage temperature:-65℃ to 150℃; (5)Ambient temperature:-65℃ to 135℃.
Features
Features: (1)High-performance, EEPROM-based programmable logic devices (PLDs) based on second-generation MAX architecture; (2)5.0-V in-system programmability (ISP) through the built-in IEEE Std. 1149.1 Joint Test Action Group (JTAG) interface available in MAX 7000S devices,ISP circuitry compatible with IEEE Std.1532; (3)Includes 5.0-V MAX 7000 devices and 5.0-V ISP-based MAX 7000S devices; (4)Built-in JTAG boundary-scan test (BST) circuitry in MAX 7000S devices with 128 or more macrocells; (5)Complete EPLD family with logic densities ranging from 600 to 5,000 usable gates; (6)5-ns pin-to-pin logic delays with up to 175.4-MHz counter frequencies (including interconnect); (7)PCI-compliant devices available.
Diagrams
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 EPM7128STC100-10N |
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IC MAX 7000 CPLD 128 100-TQFP |
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