AT45DB021D-SH-T

Product Summary

The AT45DB021D-SH-T is a 2.7-volt only, serial interface Flash memory suitable for in-system reprogramming. Its 2,162,688 bits of memory are organized as 1024 pages of 264-bytes each. In addition to the main memory, the AT45DB021D-SH-T also contains two SRAM data buffers of 264-bytes each. The buffers allow receiving of data while a page in the main memory is being reprogrammed. Unlike conventional Flash memories that are accessed randomly with multiple address lines and a parallel interface, the DataFlash uses a serial interface to sequentially access its data. The simple serial interface facilitates hardware layout, increases system reliability, minimizes switching noise, and reduces package size and active pin count. The device is optimized for use in many commercial and industrial applications where high density, low pin count, low voltage, and low power are essential. Typical applications for the DataFlash are digital voice storage, image storage, and data storage. The device operates at clock frequencies up to 5 MHz with a typical active read current consumption of 4 mA. To allow for simple in-system reprogrammability, the AT45DB021D-SH-T does not require high input voltages for program-ming. The device operates from a single power supply, 2.7V to 3.6V, for both the program and read operations. The AT45DB021D-SH-T is enabled through the chip select pin (CS) and accessed via a three-wire interface consisting of the Serial Input (SI), Serial Output (SO), and the Serial Clock (SCK). All programming cycles are self-timed, and no separate erase cycle is required before programming.

Parametrics

Absolute maximum ratings: (1)Temperature under Bias: -55鈩?to +125鈩? (2)Storage Temperature: -65鈩?to +150鈩? (3)All Input Voltages (including NC Pins) with Respect to Ground: -0.6V to +6.25V; (4)All Output Voltages with Respect to Ground: -0.6V to VCC + 0.6V.

Features

Features: (1)Single 2.7V to 3.6V Supply; (2)Serial Interface Architecture; (3)Page Program Operation; (4)Two 264-Byte SRAM Data Buffers 鈥?Allows Receiving of Data while Reprogramming of Non-Volatile Memory; (5)Internal Program and Control Timer; (6)Fast Page Program Time 鈥?7 ms Typical; (7)120 ms Typical Page to Buffer Transfer Time; (8)Low Power Dissipation; (9)5 MHz Max Clock Frequency; (10)Hardware Data Protection Feature; (11)Serial Peripheral Interface (SPI) Compatible 鈥?Modes 0 and 3; (12)CMOS and TTL Compatible Inputs and Outputs; (13)Commercial and Industrial Temperature Ranges.

Diagrams

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